Nexperia

74AVC4T774PW-Q100

4-bit dual supply translating transceiver; 3-state

6. Pinning information

6.1. Pinning

74AVC4T774

DIR1

VCC(A)

DIR2

VCC(B)

A1

B1

A2

B2

A3

B3

A4

B4

DIR3

GND

DIR4

OE

aaa-027528

1

2

3

4

5

6

7

8

10

9

12

11

14

13

16

15

Fig. 3. Pin configuration SOT403-1 (TSSOP16)

6.2. Pin description

Table 3. Pin description

Symbol

Pin

Description

VCC(A)

16

supply voltage A (An, OE and DIRn inputs are referenced to VCC(A))

DIR1, DIR2, DIR3, DIR4 1, 2, 7, 8

direction control input

A1, A2, A3, A4

3, 4, 5, 6

data input or output

GND

10

ground (0 V)

B1, B2, B3, B4

14, 13, 12, 11

data input or output

OE

9

output enable input (active LOW)

VCC(B)

15

supply voltage B (Bn pins are referenced to VCC(B))

7. Functional description

Table 4. Function table [1] [2]

Supply voltage

Input

Input/output

VCC(A), VCC(B)

OE

DIR1

DIR2

DIR3

DIR4

An

Bn

0.8 V to 3.6 V

L

L

X

X

X

A1 = B1

input B1

0.8 V to 3.6 V

L

H

X

X

X

input A1

B1 = A1

0.8 V to 3.6 V

L

X

L

X

X

A2 = B2

input B2

0.8 V to 3.6 V

L

X

H

X

X

input A2

B2 = A2

0.8 V to 3.6 V

L

X

X

L

X

A3 = B3

input B3

0.8 V to 3.6 V

L

X

X

H

X

input A3

B3 = A3

0.8 V to 3.6 V

L

X

X

X

L

A4 = B4

input B4

0.8 V to 3.6 V

L

X

X

X

H

input A4

B4 = A4

0.8 V to 3.6 V

H

X

X

X

X

Z

Z

GND [3]

X

X

X

X

X

Z

Z

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

[2] The An, DIRn and OE input circuit is referenced to VCC(A); The Bn input circuit is referenced to VCC(B).

[3] If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode.

74AVC4T774PW_Q100

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 1 — 20 October 2021

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