KSZ9563RNXC-TR datasheet(174/226 Pages) MICROCHIP

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KSZ9563R

DS00002419D-page 174

 2017-2018 Microchip Technology Inc.

5.2.9

PORT N: PORT SWITCH QUEUE MANAGEMENT CONTROL REGISTERS (0xNA00 -

0xNAFF)

5.2.9.1

Port Control 0 Register

5.2.9.2

Port Control 1 Register

Address:

0xNA00 - 0xNA03

Port N: 1-3

Size:

32 bits

Bits

Description

Type

Default

32:0

TBD

Address:

0xNA04 - 0xNA03

Port N: 1-3

Size:

32 bits

Bits

Description

Type

Default

31:3

RESERVED

0x0000000

Port 3 VLAN Membership

This feature does not utilize VLAN tags or the VLAN Table, and is unrelated

to tag-based VLAN functions. Also refer to bit 1 in the Queue Management

Control 0 Register.

1 = Frames may be forwarded to this port

0 = Frames are blocked from being forwarded to this port

Port 2 VLAN Membership

This feature does not utilize VLAN tags or the VLAN Table, and is unrelated

to tag-based VLAN functions. Also refer to bit 1 in the Queue Management

Control 0 Register.

1 = Frames may be forwarded to this port

0 = Frames are blocked from being forwarded to this port

Port 1 VLAN Membership

This feature does not utilize VLAN tags or the VLAN Table, and is unrelated

to tag-based VLAN functions. Also refer to bit 1 in the Queue Management

Control 0 Register.

1 = Frames may be forwarded to this port

0 = Frames are blocked from being forwarded to this port

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