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STM32H753II Fiches technique(PDF) 304 Page - STMicroelectronics |
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STM32H753II Fiches technique(HTML) 304 Page - STMicroelectronics |
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304 / 361 page ![]() Electrical characteristics (rev V) STM32H753xI 304/360 DS12117 Rev 8 Figure 102. SPI timing diagram - slave mode and CPHA = 0 Figure 103. SPI timing diagram - slave mode and CPHA = 1(1) 1. Measurement points are done at 0.5VDD and with external CL = 30 pF. MSv41658V1 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tc(SCK) tr(SCK) th(NSS) tdis(SO) tsu(NSS) ta(SO) tv(SO) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(SO) tf(SCK) Last bit IN MSv41659V1 NSS input CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tsu(NSS) tc(SCK) ta(SO) tv(SO) First bit OUT Next bits OUT Next bits IN Last bit OUT th(SO) tr(SCK) tf(SCK) th(NSS) tdis(SO) First bit IN Last bit IN |
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