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STM32L053C8 Fiches technique(PDF) 107 Page - STMicroelectronics |
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STM32L053C8 Fiches technique(HTML) 107 Page - STMicroelectronics |
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107 / 136 page ![]() DS10152 Rev 9 107/136 STM32L053x6 STM32L053x8 Electrical characteristics 113 Figure 31. SPI timing diagram - slave mode and CPHA = 0 Figure 32. SPI timing diagram - slave mode and CPHA = 1(1) 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. MSv41658V1 NSS input CPHA=0 CPOL=0 CPHA=0 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tc(SCK) tr(SCK) th(NSS) tdis(SO) tsu(NSS) ta(SO) tv(SO) Next bits IN Last bit OUT First bit IN First bit OUT Next bits OUT th(SO) tf(SCK) Last bit IN MSv41659V1 NSS input CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO output MOSI input tsu(SI) th(SI) tw(SCKL) tw(SCKH) tsu(NSS) tc(SCK) ta(SO) tv(SO) First bit OUT Next bits OUT Next bits IN Last bit OUT th(SO) tr(SCK) tf(SCK) th(NSS) tdis(SO) First bit IN Last bit IN |
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