Moteur de recherche de fiches techniques de composants électroniques
  French  ▼
ALLDATASHEET.FR

X  

Preview PDF HTML

32G474 Fiches technique(PDF) 175 Page - STMicroelectronics

No de pièce 32G474
Description  Arm® Cortex®-M4 32-bit MCUFPU, 170 MHz / 213 DMIPS, 128 KB SRAM, rich analog, math acc, 184 ps 12 chan Hi-res timer
PDF  236 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

32G474 Fiches technique(HTML) 175 Page - STMicroelectronics

Back Button 32G474 Datasheet HTML 171Page - STMicroelectronics 32G474 Datasheet HTML 172Page - STMicroelectronics 32G474 Datasheet HTML 173Page - STMicroelectronics 32G474 Datasheet HTML 174Page - STMicroelectronics 32G474 Datasheet HTML 175Page - STMicroelectronics 32G474 Datasheet HTML 176Page - STMicroelectronics 32G474 Datasheet HTML 177Page - STMicroelectronics 32G474 Datasheet HTML 178Page - STMicroelectronics 32G474 Datasheet HTML 179Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 175 / 236 page
background image
DS12288 Rev 4
175/236
STM32G474xB STM32G474xC STM32G474xE
Electrical characteristics
201
Figure 35. SPI timing diagram - slave mode and CPHA = 0
tv(SO)
Data output valid time
Slave mode
2.7 V < VDD < 3.6 V
Voltage Range V1
-9
12
ns
Slave mode
1.71 V < VDD < 3.6 V
Voltage Range V1
-9
18
Slave mode
1.71 V < VDD < 3.6 V
Voltage Range V2
-13
22
tv(MO)
Master mode
-
3.5
4.5
th(SO)
Data output hold time
Slave mode 1.71 V < VDD < 3.6 V
6
-
-
Slave mode Range V2
9
-
-
th(MO)
Master mode
2
-
-
1. Guaranteed by characterization results.
2. The maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into
SCK low or high-phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a
master having tsu(MI) = 0 while Duty(SCK) = 50%.
Table 89. SPI characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max(2)
Unit
MSv41658V1
NSS input
CPHA=0
CPOL=0
CPHA=0
CPOL=1
MISO output
MOSI input
tsu(SI)
th(SI)
tw(SCKL)
tw(SCKH)
tc(SCK)
tr(SCK)
th(NSS)
tdis(SO)
tsu(NSS)
ta(SO)
tv(SO)
Next bits IN
Last bit OUT
First bit IN
First bit OUT
Next bits OUT
th(SO)
tf(SCK)
Last bit IN



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Fiches technique Télécharger

Go To PDF Page


Lien URL



ALLDATASHEET vous a-t-il été utile ?  [ DONATE ] 

À propos de Alldatasheet   |   Publicité   |   Contactez-nous   |   Politique de confidentialité   |   Lien vers la fiche technique    |   Echange de liens   |   Fabricants
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com