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74ALVC164245-Q100 Fiches technique(PDF) 9 Page - Nexperia B.V. All rights reserved |
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74ALVC164245-Q100 Fiches technique(HTML) 9 Page - Nexperia B.V. All rights reserved |
9 / 14 page ![]() Nexperia 74ALVC164245-Q100 16-bit dual supply translating transceiver; 3-state -40 °C to +85 °C -40 °C to +125 °C Symbol Parameter Conditions Min Typ [1] Max Min Max Unit 5 V port: nAn to nBn; VI = GND to VCC; VCC(B) = 5 V; VCC(A) = 3.3 V [5] outputs enabled - 30 - - - pF outputs disabled - 15 - - - pF 3 V port: nBn to nAn; VI = GND to VCC; VCC(B) = 5 V; VCC(A) = 3.3 V [5] outputs enabled - 40 - - - pF CPD power dissipation capacitance outputs disabled - 5 - - - pF [1] All typical values are measured at nominal voltage for VCC(B) and VCC(A) and at Tamb = 25 °C. [2] tpd is the same as tPLH and tPHL. [3] ten is the same as tPZL and tPZH. [4] tdis is the same as tPLZ and tPHZ. [5] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(CL × VCC2 × fo) = sum of outputs. 10.1. Waveforms and test circuit 001aaa792 nAn, nBn input nBn, nAn output tPHL tPLH GND VI VM VM VOH VOL Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 4. Input (nAn, nBn) to output (nBn, nAn) propagation delays 74ALVC164245_Q100 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 3 — 9 April 2019 9 / 14 |
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