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56F8167 Fiches technique(PDF) 155 Page - Freescale Semiconductor, Inc |
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56F8167 Fiches technique(HTML) 155 Page - Freescale Semiconductor, Inc |
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155 / 184 page ![]() Serial Peripheral Interface (SPI) Timing 56F8367 Technical Data, Rev. 7.0 Freescale Semiconductor 155 Preliminary Figure 10-10 SPI Master Timing (CPHA = 0) Figure 10-11 SPI Master Timing (CPHA = 1) SCLK (CPOL = 0) (Output) SCLK (CPOL = 1) (Output) MISO (Input) MOSI (Output) MSB in Bits 14–1 LSB in tF tC tCL tCL tR tR tF tDS tDH tCH tDI tDV tDI(ref) tR Master MSB out Bits 14–1 Master LSB out SS (Input) tCH SS is held High on master tF SCLK (CPOL = 0) (Output) SCLK (CPOL = 1) (Output) MISO (Input) MOSI (Output) MSB in Bits 14–1 LSB in tR tC tCL tCL tF tCH tDV(ref) tDV tDI(ref) tR tF Master MSB out Bits 14– 1 Master LSB out SS (Input) tCH SS is held High on master tDS tDH tDI tR tF |
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