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74ALVC164245 Fiches technique(PDF) 2 Page - NXP Semiconductors |
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74ALVC164245 Fiches technique(HTML) 2 Page - NXP Semiconductors |
2 / 19 page 9397 750 13248 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Product data sheet Rev. 02 — 1 June 2004 2 of 19 Philips Semiconductors 74ALVC164245 16-bit dual supply translating transceiver; 3-state 3. Quick reference data [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; Σ(C L × VCC 2 × f o) = sum of the outputs. [2] The condition is VI = GND to VCC. 4. Ordering information Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns. Symbol Parameter Conditions Min Typ Max Unit tPHL, tPLH propagation delay nAn to nBn CL = 50 pF; VCCB = 4.5 V to 5.5 V; VCCA = 3.0 V to 3.6 V - 2.9 - ns propagation delay nBn to nAn CL = 50 pF; VCCB = 4.5 V to 5.5 V; VCCA = 3.0 V to 3.6 V - 2.5 - ns propagation delay nAn to nBn CL = 50 pF; VCCB = 3.0 V to 3.6 V; VCCA = 2.3 V to 2.7 V - 3.3 - ns propagation delay nBn to nAn CL = 50 pF; VCCB = 3.0 V to 3.6 V; VCCA = 2.3 V to 2.7 V - 3.0 - ns CI input capacitance - 4.0 - pF CI/O input/output capacitance A and B port - 5.0 - pF CPD power dissipation capacitance 5 V port: nAn to nBn VCCB =5V; VCCA = 3.3 V [1] [2] outputs enabled - 30 - pF outputs disabled - 15 - pF power dissipation capacitance 3 V port: nBn to nA VCCB =5V; VCCA = 3.3 V [1] [2] outputs enabled - 40 - pF outputs disabled - 5 - pF Table 2: Ordering information Type number Temperature range Package Name Description Version 74ALVC164245DGG −40 °C to +125 °C TSSOP48 plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 74ALVC164245DL −40 °C to +125 °C SSOP48 plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 |
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