1 Features
1• Designed for Signal Rates up to 400 Mbps
• Flow-Through Pinout Simplifies PCB Layout
• 150-ps Channel-to-Channel Skew (Typical)
• 100-ps Differential Skew (Typical)
• 2.7-ns Maximum Propagation Delay
• 3.3-V Power Supply Design
• High Impedance LVDS Inputs on Power Down
• Low Power Design (40 mW at 3.3-V Static)
• Interoperable With Existing 5-V LVDS Drivers
• Accepts Small Swing (350 mV Typical) Differential
Signal Levels
• Supports Input Failsafe
– Open, Short, and Terminated
• 0 V to −100 mV Threshold Region
• Operating Temperature Range: –40°C to +85°C
• Meets or Exceeds ANSI/TIA/EIA-644 Standard
• Available in TSSOP Package

2 Applications
• Multifunction Printers
• Board-to-Board Communication
• Test and Measurement
• Printers
• Data Center Interconnect
• Lab Instrumentation
• Ultrasound Scanners

3 Description
The DSLVDS1048 device is a quad CMOS flowthrough
differential line receiver designed for
applications requiring ultra-low power dissipation and
high data rates. The device is designed to support
data rates in excess of 400 Mbps (200 MHz) using
Low Voltage Differential Signaling (LVDS)
technology.
The DSLVDS1048 accepts low voltage (350 mV
typical) differential input signals and translates them
to 3-V CMOS output levels. The receiver supports a
TRI-STATE function that may be used to multiplex
outputs. The receiver also supports open, shorted,
and terminated (100-Ω) input fail-safe. The receiver
output is HIGH for all fail-safe conditions. The
DSLVDS1048 has a flow-through pinout for easy
PCB layout.
The EN and EN* inputs are ANDed together and
control the TRI-STATE outputs. The enables are
common to all four receivers. The DSLVDS1048 and
companion LVDS line driver (for example,
DSLVDS1047) provide a new alternative to highpower
PECL/ECL devices for high-speed point-topoint
interface applications.