| Moteur de recherche de fiches techniques de composants électroniques |
|
The question interval is too short.
Please try again in a few seconds.
Hello, Please ask a question about SST401_PDIP Datasheet
# Example questions:
➢ What is the typical value for the drain current (idss) at full conduction, and what is the percentage mismatch (idss1-2/idss) between the two devices?
➢ What is the common mode rejection ratio (cmr) in decibels (db), and under what conditions is it measured?
➢ What is the input capacitance (ciss) value, and at what frequency is this measurement taken?
1. General Description & Identification:
️· Device: SST313J
️· Type: Dual JFET (Junction Field-Effect Transistor)
️· Manufacturer: Linear Integrated Systems (data provided in collaboration with Micross Components)
2. Absolute Maximum Ratings (Limiting Values):
️· Breakdown Voltage (BVGSS): 50-60V
️· Gate-to-Gate Breakdown Voltage (BVGGO): ±50V
️· Drain Current (IDSS): 0.5 - 10 mA
️· Gate Voltage (VGS(off)): -0.5 to -2.5V
️· Gate Current (IGSS max): 5 - 5 pA at +125°C (high temperature)
️· Maximum Drain Dissipation (Device Dissipation): 300 mW (at free air)
3. Electrical Characteristics (Typical and Limits):
️· Transconductance (YfSS): 2000 - 7000 µmhos
️· Operating Range (YOS): 0.2-2 µmhos
️· Common Mode Rejection (CMR): 95 dB
️· Noise Figure (NF): 0.5 dB
️· Input Capacitance (CISS): 8 pF
️· Reverse Transfer Capacitance (CRSS): 1.5 pF
4. Matching Characteristics (Differential Pair - Important for Dual JFETs):
️· Offset Voltage (VGS1-2): Maximum 5 mV
️· Mismatch (YfSS): 0.6 - 3%
️· Mismatch (IDSS): 1 - 5%
5. Noise Parameters:
️· En Voltage: 20 nV/√Hz @ VDS=15V, ID=200µA, f=10Hz, NBW=1Hz.
6. Important Notes:
️· The datasheet emphasizes that the values are limiting and usage beyond those limits can damage the device.
️· The datasheet disclaims responsibility for the use of the information and any patent infringement that may arise.
️· It is a dual JFET, which means it has two transistors in one package designed to be used as a differential amplifier.
In simpler terms, the SST313J is a dual JFET designed for sensitive amplification tasks. Its low noise, good matching characteristics, and ability to reject common-mode signals (CMR) make it suitable for applications like instrumentation amplifiers, preamplifiers, and differential signal processing.
1. General Description & Identification:
️· Device: SST313J
️· Type: Dual JFET (Junction Field-Effect Transistor)
️· Manufacturer: Linear Integrated Systems (data provided in collaboration with Micross Components)
2. Absolute Maximum Ratings (Limiting Values):
️· Breakdown Voltage (BVGSS): 50-60V
️· Gate-to-Gate Breakdown Voltage (BVGGO): ±50V
️· Drain Current (IDSS): 0.5 - 10 mA
️· Gate Voltage (VGS(off)): -0.5 to -2.5V
️· Gate Current (IGSS max): 5 - 5 pA at +125°C (high temperature)
️· Maximum Drain Dissipation (Device Dissipation): 300 mW (at free air)
3. Electrical Characteristics (Typical and Limits):
️· Transconductance (YfSS): 2000 - 7000 µmhos
️· Operating Range (YOS): 0.2-2 µmhos
️· Common Mode Rejection (CMR): 95 dB
️· Noise Figure (NF): 0.5 dB
️· Input Capacitance (CISS): 8 pF
️· Reverse Transfer Capacitance (CRSS): 1.5 pF
4. Matching Characteristics (Differential Pair - Important for Dual JFETs):
️· Offset Voltage (VGS1-2): Maximum 5 mV
️· Mismatch (YfSS): 0.6 - 3%
️· Mismatch (IDSS): 1 - 5%
5. Noise Parameters:
️· En Voltage: 20 nV/√Hz @ VDS=15V, ID=200µA, f=10Hz, NBW=1Hz.
6. Important Notes:
️· The datasheet emphasizes that the values are limiting and usage beyond those limits can damage the device.
️· The datasheet disclaims responsibility for the use of the information and any patent infringement that may arise.
️· It is a dual JFET, which means it has two transistors in one package designed to be used as a differential amplifier.
In simpler terms, the SST313J is a dual JFET designed for sensitive amplification tasks. Its low noise, good matching characteristics, and ability to reject common-mode signals (CMR) make it suitable for applications like instrumentation amplifiers, preamplifiers, and differential signal processing.
| Part No. | SST401_PDIP |
| Manufacturer | MICROSS |
| Size | 282 Kbytes |
| Pages | 1 page |
| Description | a Low Noise, Low Drift, Monolithic Dual N-Channel JFET |
| ALLDATASHEET vous a-t-il été utile ? [ DONATE ] |
À propos de Alldatasheet | Publicité | Contactez-nous | Politique de confidentialité | Lien vers la fiche technique | Echange de liens | Fabricants All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |